From d6f7fb498b1347201d1c08f9c368aff27a10a77f Mon Sep 17 00:00:00 2001 From: "brice.boisson" Date: Tue, 5 Dec 2023 13:51:51 +0900 Subject: [PATCH 1/3] Add: tb archi for module PC --- tb/tb_module_program_counter.v | 51 ++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 tb/tb_module_program_counter.v diff --git a/tb/tb_module_program_counter.v b/tb/tb_module_program_counter.v new file mode 100644 index 0000000..db9ce99 --- /dev/null +++ b/tb/tb_module_program_counter.v @@ -0,0 +1,51 @@ +`timescale 1ns / 1ps +`include "tb_tools.vh" + +module tb_module_program_counter (); + reg clk; + reg reset; + reg is_jmp; + reg alu_not; + reg [1:0] is_branch; + reg [31:0] alu_out; + reg [31:0] imm; + wire [31:0] addr; + + integer i; + + module_program_counter module_program_counter ( + .clock(clk), + .reset(reset), + .is_jmp(is_jmp), + .alu_not(alu_not), + .is_branch(is_branch), + .alu_out(alu_out), + .imm(imm), + .addr(addr) + ); + + initial begin + clk = 1'b0; + for (i = 0; i < 100; i = i + 1) begin + #1 clk = ~clk; + end + end + + initial begin + + reset = 1'b1; + is_jmp = 1'b0; + alu_not = 1'b0; + is_branch = 2'b00; + alu_out = 32'b0; + imm = 32'b0; + #10 + reset = 1'b0; + `assert_no_wait("module_program_counter is_jmp: 0, is_branch: 0, alu_not: 0, alu_out: 0, imm: 0", addr, 0) + + `end_message + end + + + +endmodule : tb_module_program_counter -- 2.30.2 From 699b6434662af2e2e17e3d87792cefe94c72d1d3 Mon Sep 17 00:00:00 2001 From: "brice.boisson" Date: Tue, 5 Dec 2023 13:51:51 +0900 Subject: [PATCH 2/3] Add: tb archi for module PC --- tb/tb_module_program_counter.v | 51 ++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 tb/tb_module_program_counter.v diff --git a/tb/tb_module_program_counter.v b/tb/tb_module_program_counter.v new file mode 100644 index 0000000..db9ce99 --- /dev/null +++ b/tb/tb_module_program_counter.v @@ -0,0 +1,51 @@ +`timescale 1ns / 1ps +`include "tb_tools.vh" + +module tb_module_program_counter (); + reg clk; + reg reset; + reg is_jmp; + reg alu_not; + reg [1:0] is_branch; + reg [31:0] alu_out; + reg [31:0] imm; + wire [31:0] addr; + + integer i; + + module_program_counter module_program_counter ( + .clock(clk), + .reset(reset), + .is_jmp(is_jmp), + .alu_not(alu_not), + .is_branch(is_branch), + .alu_out(alu_out), + .imm(imm), + .addr(addr) + ); + + initial begin + clk = 1'b0; + for (i = 0; i < 100; i = i + 1) begin + #1 clk = ~clk; + end + end + + initial begin + + reset = 1'b1; + is_jmp = 1'b0; + alu_not = 1'b0; + is_branch = 2'b00; + alu_out = 32'b0; + imm = 32'b0; + #10 + reset = 1'b0; + `assert_no_wait("module_program_counter is_jmp: 0, is_branch: 0, alu_not: 0, alu_out: 0, imm: 0", addr, 0) + + `end_message + end + + + +endmodule : tb_module_program_counter -- 2.30.2 From 0aae6901e36dd925735da01582dba18d7af79a21 Mon Sep 17 00:00:00 2001 From: "brice.boisson" Date: Fri, 26 Jan 2024 16:12:22 +0100 Subject: [PATCH 3/3] Add: test PC --- tb/tb_module_program_counter.v | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tb/tb_module_program_counter.v b/tb/tb_module_program_counter.v index db9ce99..7fafbbb 100644 --- a/tb/tb_module_program_counter.v +++ b/tb/tb_module_program_counter.v @@ -42,6 +42,11 @@ module tb_module_program_counter (); #10 reset = 1'b0; `assert_no_wait("module_program_counter is_jmp: 0, is_branch: 0, alu_not: 0, alu_out: 0, imm: 0", addr, 0) + #2 + `assert_no_wait("module_program_counter is_jmp: 0, is_branch: 0, alu_not: 0, alu_out: 0, imm: 0", addr, 4) + #2 + `assert_no_wait("module_program_counter is_jmp: 0, is_branch: 0, alu_not: 0, alu_out: 0, imm: 0", addr, 8) + `end_message end -- 2.30.2