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Add: tb alu all func

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brice.boisson
2023-10-24 19:36:34 +09:00
parent b99914f42d
commit 6cc27cdc2f
2 changed files with 108 additions and 27 deletions
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9
rtl/alu.v
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@@ -3,17 +3,22 @@ module alu (input [31:0] in_a, in_b,
output reg [31:0] out);
`include "alu_func.vh"
reg signed [31:0] s_in_a;
reg signed [31:0] s_in_b;
always@ (*) begin
s_in_a = in_a;
s_in_b = in_b;
case (op_code)
ADD : out <= in_a + in_b;
SUB : out <= in_a - in_b;
SLL : out <= in_a << in_b;
SLT : out <= ((in_a[31] != in_b[31]) ? in_a[31] == 1'b1 : in_a < in_b) ? 1 : 0;
SLT : out <= (s_in_a < s_in_b) ? 1 : 0;
SLTU : out <= (in_a < in_b) ? 1 : 0;
XOR : out <= in_a ^ in_b;
SRL : out <= in_a >> in_b;
SRA : out <= in_a >>> in_b;
SRA : out <= s_in_a >>> in_b;
OR : out <= in_a | in_b;
AND : out <= in_a & in_b;
default : out <= 32'b0;