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Add: test from gcc

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brice.boisson
2023-11-20 22:20:42 +09:00
parent 93cb91f022
commit 99399cd9b3
6 changed files with 16 additions and 9 deletions
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sim/Makefile
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@@ -1,4 +1,5 @@
all:
./../scripts/get_bin.sh ../tb/test_source_code/tb_riscv_cpu/test
vsim -c -do "do simu.do; quit -f"
debug: