Add: basic element for risc-v single cycle cpu

2023-10-20 18:48:18 +09:00
parent 0e72c3a2e6
commit b3fd2a827d
11 changed files with 210 additions and 10 deletions
--- a/scripts/gen_simu_do.sh
+++ b/scripts/gen_simu_do.sh
@@ -33,5 +33,3 @@ add wave -radix unsigned *' >> ./sim/simu.do
 echo 'run -all' >> ./sim/simu.do

 exit 0
-
-# CRC - Hamming Code