18 lines
674 B
Systemverilog
18 lines
674 B
Systemverilog
`define assert(message, expected, got) \
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#4 \
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if(expected !== got) begin \
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$display("\033[0;31m[FAIL]\033[0m %s - got: %d, expected: %d", message, expected, got); \
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end else \
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$display("\033[0;32m[PASS]\033[0m %s", message);
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`define assert_no_wait(message, expected, got) \
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if(expected !== got) begin \
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$display("\033[0;31m[FAIL]\033[0m %s - got: %d, expected: %d", message, expected, got); \
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end else \
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$display("\033[0;32m[PASS]\033[0m %s", message);
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`define end_message $display("\033[0;32mIf no \033[0mFAIL\033[0;32m messages, all tests passed!\033[0m");
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`define next_cycle \
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#1 clk = ~clk; \
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#1 clk = ~clk; |