2023-10-23 05:15:21 +00:00
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module instruction (input [31:0] address,
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output [31:0] instruction);
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2023-10-20 09:48:18 +00:00
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2023-10-22 13:41:39 +00:00
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reg [31:0] memory [63:0];
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2023-10-20 09:48:18 +00:00
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assign instruction = memory[address];
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endmodule
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