Add: risc-v test bubble sort

2023-10-26 17:43:00 +09:00
parent d51ea5c4c8
commit 9613e2566e
6 changed files with 124 additions and 56 deletions
--- a/2
+++ b/2
@@ -9,6 +9,8 @@ simulation:

 clean:
 	rm -rf sim/work
+	rm -rf work
 	rm -rf sim/transcript
+	rm -rf transcript
 	rm -rf sim/vsim.wlf
 	rm -rf sim/simu.do