Add: named parameter for ALU func | alu test case
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brice.boisson
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rtl/alu.v
21
rtl/alu.v
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@ -2,17 +2,20 @@ module alu (input [31:0] in_a, in_b,
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input [3:0] op_code,
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output reg [31:0] out);
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`include "alu_func.vh"
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always@ (*) begin
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case (op_code)
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4'b0000 : out <= in_a + in_b;
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4'b0001 : out <= in_a - in_b;
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4'b0010 : out <= in_a << in_b;
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4'b0011 : out <= (in_a < in_b) ? 1 : 0;
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4'b0100 : out <= in_a ^ in_b;
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4'b0101 : out <= in_a >> in_b;
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4'b0111 : out <= in_a >>> in_b;
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4'b1000 : out <= in_a | in_b;
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4'b1001 : out <= in_a & in_b;
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ADD : out <= in_a + in_b;
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SUB : out <= in_a - in_b;
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SLL : out <= in_a << in_b;
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SLT : out <= ((in_a[31] != in_b[31]) ? in_a[31] == 1'b1 : in_a < in_b) ? 1 : 0;
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SLTU : out <= (in_a < in_b) ? 1 : 0;
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XOR : out <= in_a ^ in_b;
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SRL : out <= in_a >> in_b;
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SRA : out <= in_a >>> in_b;
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OR : out <= in_a | in_b;
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AND : out <= in_a & in_b;
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default : out <= 32'b0;
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endcase
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end
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@ -0,0 +1,10 @@
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parameter [3:0] ADD = 4'b0000;
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parameter [3:0] SUB = 4'b0001;
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parameter [3:0] SLL = 4'b0010;
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parameter [3:0] SLT = 4'b0011;
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parameter [3:0] SLTU = 4'b0100;
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parameter [3:0] XOR = 4'b0101;
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parameter [3:0] SRL = 4'b0110;
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parameter [3:0] SRA = 4'b0111;
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parameter [3:0] OR = 4'b1000;
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parameter [3:0] AND = 4'b1001;
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@ -10,19 +10,19 @@ module decoder (input [31:0] instruction,
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output reg pc_is_jmp, alu_not);
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`include "op_code.vh"
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`include "alu_func.vh"
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function [3:0] get_alu_func(input [2:0] op_code, input arithmetic);
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begin
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case (op_code)
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3'b000 : get_alu_func = arithmetic ? 4'b0001 : 4'b0000;
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3'b001 : get_alu_func = 4'b0010;
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3'b010 : get_alu_func = 4'b0011;
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3'b011 : get_alu_func = 4'b0011;
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3'b100 : get_alu_func = 4'b0100;
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3'b101 : get_alu_func = arithmetic ? 4'b0111 : 4'b0101;
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3'b110 : get_alu_func = 4'b1000;
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3'b111 : get_alu_func = 4'b1010;
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3'b111 : get_alu_func = 4'b1011;
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3'b000 : get_alu_func = arithmetic ? SUB : ADD;
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3'b001 : get_alu_func = SLL;
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3'b010 : get_alu_func = SLT;
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3'b011 : get_alu_func = SLTU;
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3'b100 : get_alu_func = XOR;
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3'b101 : get_alu_func = arithmetic ? SRA : SRL;
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3'b110 : get_alu_func = OR;
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3'b111 : get_alu_func = AND;
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default : get_alu_func= 4'b0000;
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endcase
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end
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@ -31,15 +31,14 @@ endfunction
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function [3:0] get_alu_func_imm(input [2:0] op_code, input arithmetic);
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begin
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case (op_code)
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3'b000 : get_alu_func_imm = 4'b0000;
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3'b001 : get_alu_func_imm = 4'b0010;
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3'b010 : get_alu_func_imm = 4'b0011;
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3'b011 : get_alu_func_imm = 4'b0100;
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3'b100 : get_alu_func_imm = 4'b0101;
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3'b101 : get_alu_func_imm = arithmetic ? 4'b1000 : 4'b0111;
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3'b110 : get_alu_func_imm = 4'b1001;
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3'b111 : get_alu_func_imm = 4'b1010;
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3'b111 : get_alu_func_imm = 4'b1011;
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3'b000 : get_alu_func_imm = ADD;
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3'b001 : get_alu_func_imm = SLL;
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3'b010 : get_alu_func_imm = SLT;
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3'b011 : get_alu_func_imm = SLTU;
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3'b100 : get_alu_func_imm = XOR;
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3'b101 : get_alu_func_imm = arithmetic ? SRA : SRL;
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3'b110 : get_alu_func_imm = OR;
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3'b111 : get_alu_func_imm = AND;
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default : get_alu_func_imm = 4'b0000;
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endcase
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end
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97
tb/tb_alu.v
97
tb/tb_alu.v
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@ -2,6 +2,8 @@
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`include "tb_tools.vh"
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module tb_alu ();
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`include "../rtl/alu_func.vh"
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reg [31:0] in_a;
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reg [31:0] in_b;
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reg [3:0] op_code;
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@ -15,9 +17,10 @@ module tb_alu ();
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);
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initial begin
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// ALU - Add
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in_a = 32'b0;
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in_b = 32'b0;
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op_code = 4'b0000;
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op_code = ADD;
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`assert("alu : 0 + 0", out, 0)
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in_a = 32'b1;
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`assert("alu : 1 + 0", out, 1)
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@ -26,6 +29,98 @@ module tb_alu ();
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op_code = 4'b0001;
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`assert("alu : 1 - 1", out, 0)
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// ALU - left shift
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in_a = 32'b1;
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in_b = 32'b1;
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op_code = SLL;
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`assert("alu : 1 << 1", out, 2)
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in_b = 32'b10;
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`assert("alu : 1 << 2", out, 4)
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in_a = 32'b11;
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`assert("alu : 3 << 2", out, 12)
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in_b = 32'b11110;
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`assert("alu : 3 << 30", out, 32'b11000000000000000000000000000000)
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in_b = 32'b11111;
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`assert("alu : 3 << 31", out, 32'b10000000000000000000000000000000)
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in_b = 32'b100000;
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`assert("alu : 3 << 31", out, 32'b00000000000000000000000000000000)
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// ALU - less than
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in_a = 32'b0;
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in_b = 32'b0;
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op_code = SLT;
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`assert("alu : 0 < 0", out, 0)
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in_b = 32'b10;
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`assert("alu : 0 << 2", out, 1)
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in_a = 32'b11;
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`assert("alu : 3 < 2", out, 0)
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in_b = 32'b11111111111111111111111111111111;
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in_a = 32'b11111111111111111111111111111111;
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`assert("alu : -1 < -1", out, 0)
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in_b = 32'b0;
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`assert("alu : -1 < 0", out, 1)
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in_a = 32'b10000000000000000000000000000000;
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in_b = 32'b10000000000000000000000000000001;
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`assert("alu : MIN_INT << MIN_INT + 1", out, 1)
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// ALU - xor
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in_a = 32'b0;
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in_b = 32'b0;
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op_code = XOR;
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`assert("alu : 0 ^ 0", out, 32'b00000000000000000000000000000000)
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in_a = 32'b1;
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`assert("alu : 1 ^ 0", out, 32'b00000000000000000000000000000001)
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in_a = 32'b0;
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in_b = 32'b1;
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`assert("alu : 0 ^ 1", out, 32'b00000000000000000000000000000001)
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in_a = 32'b11111111111111111111111111111111;
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in_b = 32'b11111111111111111111111111111111;
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`assert("alu : MAX_INT ^ MAX_INT", out, 32'b00000000000000000000000000000000)
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in_a = 32'b00000000000000000000000000000000;
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in_b = 32'b11111111111111111111111111111111;
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`assert("alu : 0 ^ MAX_INT", out, 32'b11111111111111111111111111111111)
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in_a = 32'b00000011001000010001000011000000;
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in_b = 32'b10101111001011101110111111111011;
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`assert("alu : 00000011001000010001000011000000 ^ 10101111001011101110111111111011", out, 32'b10101100000011111111111100111011)
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// ALU - right shift
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in_a = 32'b1;
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in_b = 32'b1;
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op_code = SRL;
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`assert("alu : 1 >> 1", out, 0)
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in_a = 32'b10;
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`assert("alu : 2 >> 1", out, 1)
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in_a = 32'b11;
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`assert("alu : 3 >> 2", out, 1)
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in_a = 32'b11110;
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in_b = 32'b1;
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`assert("alu : 30 >> 1", out, 32'b1111)
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in_a = 32'b10000000000000000000000000000000;
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in_b = 32'b11111;
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`assert("alu : 1000...000 >> 31", out, 32'b00000000000000000000000000000001)
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in_a = 32'b10000000111100000000000111111111;
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in_b = 32'b11111;
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`assert("alu : 1000..111 >> 31", out, 32'b00000000000000000000000000000001)
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// // ALU - logical right shift
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// in_a = 32'b1;
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// in_b = 32'b1;
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// op_code = 4'b0110;
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// `assert("alu : 1 >> 1", out, 0)
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// in_a = 32'b10;
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// `assert("alu : 2 >> 1", out, 1)
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// in_a = 32'b11;
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// `assert("alu : 3 >> 2", out, 1)
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// in_a = 32'b11110;
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// in_b = 32'b1;
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// `assert("alu : 30 >> 1", out, 32'b1111)
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// in_a = 32'b10000000000000000000000000000000;
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// in_b = 32'b11111;
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// `assert("alu : 1000...000 >> 31", out, 32'b00000000000000000000000000000001)
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// in_a = 32'b10000000111100000000000111111111;
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// in_b = 32'b11111;
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// `assert("alu : 1000..111 >> 31", out, 32'b00000000000000000000000000000001)
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`end_message
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end
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