brice.boisson
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c1a099c75d
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Fix: remove useless control signal
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2023-10-23 11:37:10 +09:00 |
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brice.boisson
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44ac59210c
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Fix: clean name [1]
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2023-10-23 11:24:09 +09:00 |
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brice.boisson
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57216f7c85
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Fix: use parameter to name op code
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2023-10-23 10:10:49 +09:00 |
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brice.boisson
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54e3ecdfa3
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Fix: set right value alu auipc
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2023-10-23 09:50:51 +09:00 |
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brice.boisson
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766f77fa6c
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Add: sign extension - cpu is now able to compute fibonacci
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2023-10-23 09:41:40 +09:00 |
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brice.boisson
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f717284c47
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Add: assembly of risc-v cpu
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2023-10-21 22:57:58 +09:00 |
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brice.boisson
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b3fd2a827d
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Add: basic element for risc-v single cycle cpu
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2023-10-20 18:48:18 +09:00 |