brice.boisson
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479f110cd7
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Add: power test source code
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2023-11-29 10:39:48 +09:00 |
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brice.boisson
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91514de821
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Add: loop and multiplication source code test | expend instruction memory size | Fix: on empty test file
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2023-11-27 14:27:09 +09:00 |
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brice.boisson
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db5d909402
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Add: begining bubble sort test | Fix: branch and imm value extension
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2023-10-25 11:07:19 +09:00 |
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brice.boisson
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67c71565c0
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Fix: memory addressing 32 to 8 bits
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2023-10-24 21:52:07 +09:00 |
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brice.boisson
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0fb4170797
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Add: tb_risc_v fibonacci compute
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2023-10-24 21:19:24 +09:00 |
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brice.boisson
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72d688018b
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Fix: clean name [3]
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2023-10-23 14:15:21 +09:00 |
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brice.boisson
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766f77fa6c
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Add: sign extension - cpu is now able to compute fibonacci
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2023-10-23 09:41:40 +09:00 |
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brice.boisson
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33835ec0ed
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Fix: reset edge
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2023-10-22 22:41:39 +09:00 |
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brice.boisson
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b3fd2a827d
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Add: basic element for risc-v single cycle cpu
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2023-10-20 18:48:18 +09:00 |