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RISC-V_Verilog/sim/Makefile

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Makefile
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Add: Makefile
2023-10-11 08:43:36 +00:00
all:
Add: new make way enabling multiple asm generated test
2023-11-22 02:35:08 +00:00
./../scripts/run_test.sh $(TARGET)
Add: Makefile
2023-10-11 08:43:36 +00:00
debug:
Add: new make way enabling multiple asm generated test
2023-11-22 02:35:08 +00:00
./../scripts/run_test.sh $(TARGET) debug