Add: Makefile

This commit is contained in:
brice.boisson 2023-10-11 17:43:36 +09:00
parent 83286df734
commit 0e72c3a2e6
6 changed files with 65 additions and 0 deletions

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all: simulation
$(MAKE) -C sim $@
debug: simulation
$(MAKE) -C sim $@
simulation:
./scripts/gen_simu_do.sh $(TARGET) $(WAVE)
clean:
rm -rf sim/work
rm -rf sim/transcript
rm -rf sim/vsim.wlf
rm -rf sim/simu.do

6
rtl/alu.v Normal file
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module alu (S, A, B);
output [31:0] S;
input [31:0] A, B;
xor N[31:0] (S, A, B);
endmodule

37
scripts/gen_simu_do.sh Executable file
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#! /bin/sh
if [ $# -lt 1 ]; then
echo "Usage: $0 <file_name> [signal]"
exit 1
fi
FILE_NAME=$1
echo 'puts "Simulation script for ModelSim"
' > ./sim/simu.do
# test if "$1".v and tb_"$1".v files exist
if [ ! -f "rtl/""$FILE_NAME"".v" ]; then
echo "Error: $FILE_NAME.v file not found!"
exit 1
fi
if [ ! -f "tb/tb_""$FILE_NAME"".v" ]; then
echo "Error: tb_$FILE_NAME.v file not found!"
exit 1
fi
echo 'vlib work
vlog ../rtl/*.v
vlog ../tb/tb_'"$FILE_NAME"'.v
' >> ./sim/simu.do
echo 'vsim tb_'"$FILE_NAME"'
add wave -radix unsigned *' >> ./sim/simu.do
# loop through all arguments from $3
echo 'run -all' >> ./sim/simu.do
exit 0
# CRC - Hamming Code

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all:
vsim -c -do "do simu.do; quit -f"
debug:
vsim -do "do simu.do"

3
tb/tb_alu.v Normal file
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module tb_alu (S);
output [31:0] S;
endmodule