4 Commits

Author	SHA1	Message	Date
BOISSON Brice	e8c7cb474d	Fix: tb reg bank delay first test after end of reset (#11)	2023-12-05 13:54:17 +09:00
brice.boisson	cd6972af6d	Add: archi and comment in top level | Fix: missing var declaration in reg test bench	2023-11-29 11:30:58 +09:00
brice.boisson	9613e2566e	Add: risc-v test bubble sort	2023-10-26 17:43:00 +09:00
brice.boisson	7c1a871e99	Add: tb registers bank	2023-10-24 20:08:36 +09:00