Commit Graph

17 Commits

Author SHA1 Message Date
brice.boisson
e0b2ada62f Add: error message when the number of ran test is lower than the number of test present is the assmbly file (the number of ran test can be superior, and in few time lower that's why it's only a warning 2023-11-30 14:43:01 +09:00
brice.boisson
91514de821 Add: loop and multiplication source code test | expend instruction memory size | Fix: on empty test file 2023-11-27 14:27:09 +09:00
brice.boisson
9d82414a58 Fix: remove print in gen_test.py 2023-11-26 22:08:00 +09:00
brice.boisson
7949850418 Add: new test source code + Fix: gen_bin script and bin path 2023-11-25 23:18:24 +09:00
brice.boisson
9ac36fa030 Fix: clean environment between two test 2023-11-24 19:47:36 +09:00
brice.boisson
2fa5a5dc60 Fix: remove work between two test 2023-11-24 19:42:21 +09:00
brice.boisson
9361c493c4 Fix: Model Sim Warning Message 2023-11-24 19:41:40 +09:00
brice.boisson
ed1220978f Add: test name 2023-11-24 19:38:08 +09:00
brice.boisson
81268259ff Add: Formating test output 2023-11-24 19:28:08 +09:00
brice.boisson
6f4f7f6969 Add: new make way enabling multiple asm generated test 2023-11-22 11:35:08 +09:00
brice.boisson
e2ca11548c Add: generate file on make 2023-11-21 18:45:25 +09:00
brice.boisson
7d60960831 Add: generate test from comment in assembly file 2023-11-21 18:36:10 +09:00
brice.boisson
99399cd9b3 Add: test from gcc 2023-11-20 22:20:42 +09:00
brice.boisson
93cb91f022 Add: script 2023-11-20 14:21:26 +09:00
brice.boisson
9613e2566e Add: risc-v test bubble sort 2023-10-26 17:43:00 +09:00
brice.boisson
b3fd2a827d Add: basic element for risc-v single cycle cpu 2023-10-20 18:48:18 +09:00
brice.boisson
0e72c3a2e6 Add: Makefile 2023-10-11 17:43:36 +09:00